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Micrel, Inc. ULTRA PRECISION DUAL 2:1 400mV LVPECL MUX WITH INTERNAL TERMINATION Precision Edge SY58027U Precision Edge(R) SY58027U (R) FEATURES s Two independent differential 2:1 multiplexers s Guaranteed AC performance over temperature and voltage: * DC-to >10.7Gbps data rate throughput * < 290ps IN-to-Out tpd * < 80ps tr / tf s Unique, patent-pending input isolation design minimizes crosstalk s Ultra-low jitter design: * <1psRMS random jitter * <10psPP deterministic jitter * <10psPP total jitter (clock) * <0.7psRMS crosstalk-induced jitter s Unique, patent-pending 50 input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, LVDS, PECL) s 400mV LVPECL output swing s Power supply 2.5V 5% or 3.3V 10% s -40C to +85C temperature range s Available in 32-pin (5mm x 5mm) MLF(R) package Precision Edge(R) DESCRIPTION The SY58027U features two ultra-fast, low jitter 2:1 differential muxes with a guaranteed maximum data throughput of 10.7Gbps. The SY58027U differential inputs include a unique internal termination design that allows access to the termination network through a VT pin. The device easily interfaces to different logic standards, both AC- and DCcoupled, without external resistor-bias and termination networks. The result is a clean, stub-free, low jitter interface solution. The differential 400mV LVPECL outputs have extremely fast rise/fall times guaranteed to be less than 80ps. The SY58027U operates from a 2.5V or 3.3V supply and is guaranteed over the full industrial temperature range (-40C to +85C). The SY58027U is part of Micrel's Precision Edge(R) product family. All support documentation can be found on Micrel's web site at www.micrel.com. APPLICATIONS s s s s Data communication systems All SONET OC3-OC768 applications All Fibre Channel applications All GigE applications FUNCTIONAL BLOCK DIAGRAM INA0 50 VTA0 50 /INA0 VREF-ACA0 INA1 50 VTA1 50 /INA1 VREF-ACA1 SELA (TTL/CMOS) 1 S MUX A 0 INB0 50 VTB0 50 0 QA /QA /INB0 VREF-ACB0 INB1 50 VTB1 50 /INB1 VREF-ACB1 SELB (TTL/CMOS) 1 S MUX B QB /QB AnyGate and Precision Edge are registered trademarks of Micrel, Inc. MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc. M9999-020207 hbwhelp@micrel.com or (408) 955-1690 Rev.: C Amendment: /0 1 Issue Date: February 2007 Micrel, Inc. Precision Edge(R) SY58027U PACKAGE/ORDERING INFORMATION INA1 VREF-ACA1 VTA1 INA1 /INA0 VREF-ACA0 VTA0 INA0 Ordering Information(1) Part Number SY58027UMI GND VCC QA /QA VCC NC SELA VCC Package Type MLF-32 MLF-32 MLF-32 MLF-32 Operating Range Industrial Industrial Industrial Industrial Package Marking SY58027U SY58027U SY58027U with Pb-Free bar-line indicator SY58027U with Pb-Free bar-line indicator Lead Finish Sn-Pb Sn-Pb Pb-Free NiPdAu Pb-Free NiPdAu 32 31 30 29 28 27 26 25 INB0 VTB0 VREF-ACB0 /INB0 INB1 VTB1 VREF-ACB1 /INB1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 24 23 22 21 20 19 18 17 SY58027UMITR(2) SY58027UMG(3) SY58027UMGTR(2, 3) Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC electricals only. 2. Tape and Reel. 3. Pb-Free package recommended for new designs. 32-Pin MLF(R) (MLF-32) PIN DESCRIPTION Pin Number 25, 28, 29, 32, 1, 4, 5, 8 Pin Name INA0, /INA0, INA1, /INA1, INB0, /INB0, INB1, /INB1 Pin Function Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC- or DC-coupled differential signals as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50. Note that these inputs will default to an indeterminate state if left open. Unused differential input pairs can be terminated by connecting one input to VCC and the complementary input to GND through a 1k resistor. The VT pin is to be left open in this configuration. Please refer to the "Input Interface Applications" section for more details. Input Termination Center-Tap: Each side of the differential input pair, terminates to a VT pin. Each VT pin provides a center-tap to a termination network for maximum interface flexibility. See "Input Interface Applications" section for more details. Bank A, Bank B Input Channel Select (TTL/CMOS): These TTL/CMOS-compatible inputs select the inputs to the multiplexers. These inputs are internally connected to a 25k pull-up resistor and will default to a logic HIGH state if left open. Input switching threshold is VCC/2. Reference Output Voltage: These outputs bias to VCC -1.2V. Connect to VT pin when AC-coupling the data inputs. Bypass with 0.01F low ESR capacitor to VCC. Maximum current source or sink is 0.5mA. See "Input Interface Applications" section. Positive Power Supply: Bypass with 0.1F0.01F low ESR capacitors. Differential 100k LVPECL Outputs: MUX A and MUX B selected LVPECL outputs. See "Output Interface Applications" section for termination. Refer to the "Truth Table" for logic operation. Ground: Ground pins and exposed pad must be connected to the same ground plane. Not connected. 26, 30, 2, 6 18, 15 27, 31, 3, 7 10, 13, 16, 17, 20, 23 22, 21, 12, 11 9, 24 14, 19 M9999-020207 hbwhelp@micrel.com or (408) 955-1690 GND VCC /QB QB VCC NC SELB VCC VTA0 , VTA1, VTB0, VTB1 SELA, SELB VREF-ACA0, VREF-ACA1, VREF-ACB0, VREF-ACB1 VCC QA, /QA, QB, /QB GND, Exposed pad NC 2 Micrel, Inc. Precision Edge(R) SY58027U Absolute Maximum Ratings(1) Power Supply Voltage (VCC ) ...................... -0.5V to +4.0V Input Voltage (VIN) ......................................... -0.5V to VCC LVPECL Output Current (IOUT) Continuous ............................................................. 50mA Surge .................................................................... 100mA Termination Current(3) Source or sink current on VT ..................................... 100mA Input Current Source or sink current on IN, /IN .......................... 50mA Current (VREF-AC) Source or sink current on VREF-AC(3) .................. 1.5mA Lead Temperature (soldering, 20 sec.) ..................... 260C Storage Temperature Range (TS ) ........... -65C to +150C Operating Ratings(2) Power Supply Voltage (VCC) ............... +2.375V to +2.625V ............................................................ +3.0V to +3.6V Ambient Temperature Range (TA) ............. -40C to +85C Package Thermal Resistance MLF(R) (JA) Still-Air ............................................................. 35C/W 500lpfm ............................................................ 28C/W MLF(R) (JB)(4) Junction-to-board ............................................ 20C/W DC ELECTRICAL CHARACTERISTICS(5) TA= -40C to +85C; Unless otherwise stated. Symbol VCC ICC RDIFF_IN RIN VIH VIL VIN VDIFF_IN VT IN VREF-AC Notes: 1. Permanent device damage may occur if ratings in the "Absolute Maximum Ratings" section are exceeded. This is a stress rating only and functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Due to the limited drive capability, use for input of the same package only. 4. Junction-to-board resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential (GND) on the PCB. JB uses 4layer JA in still air unless otherwise stated. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. Parameter Power Supply Power Supply Current Differential Input Resistance (IN-to-/IN) Input Resistance (IN-to-VT, /IN-to-VT) Input High Voltage (IN, /IN) Input Low Voltage (IN, /IN) Input Voltage Swing (IN, /IN) Differential Input Voltage Swing |IN - /IN| In to VT (IN, /IN) Output Reference Voltage Condition VCC = 2.5V VCC = 3.3V No load, max. VCC. Min 2.375 3.0 Typ 2.5 3.3 100 Max 2.625 3.6 140 120 Units V V mA 80 100 40 VCC-1.2 0 See Figure 1a. See Figure 1b. 0.1 0.2 50 60 VCC VIH -0.1 1.7 3.4 1.28 V V V V V V VCC-1.3 VCC-1.2 VCC-1.1 M9999-020207 hbwhelp@micrel.com or (408) 955-1690 3 Micrel, Inc. Precision Edge(R) SY58027U LVPECL OUTPUTS DC ELECTRICAL CHARACTERISTICS(6) VCC = 2.5V 5% or 3.3V 10%; TA = -40C to +85C; RL = 50 to VCC-2V, unless otherwise stated. Symbol VOH VOL VOUT VDIFF-OUT Parameter Output HIGH Voltage Q, /Q Output LOW Voltage Q, /Q Output Voltage Swing Q, /Q Differential Output Voltage Swing |Q-/Q| See Figure 1a. See Figure 1b. Condition Min VCC-1.145 VCC-1.545 150 300 Typ -- -- 400 800 Max VCC-0.895 VCC-1.295 Units V V mV mV LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS(6) VCC = 2.5V 5% or 3.3V 10%; TA= -40C to 85C unless otherwise stated. Symbol VIH VIL IIH IIL Note: 6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. Parameter Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current Condition Min 2.0 Typ Max Units V 0.8 -175 VIL = 0V -300 75 V A A M9999-020207 hbwhelp@micrel.com or (408) 955-1690 4 Micrel, Inc. Precision Edge(R) SY58027U AC ELECTRICAL CHARACTERISTICS(7) VCC = 2.5V 5% or 3.3V 10%; TA= -40C to +85C; RL = 50 to VCC-2V, unless otherwise stated. Symbol fMAX tpd Parameter Maximum Operating Frequency VOUT 200mV Propagation Delay IN-to-Q SEL-to-Q tSKEW Input-to-Input Skew (Within-bank) Bank-to-Bank Skew Part-to-Part Skew tJITTER Data Clock Random Jitter (RJ) Deterministic Jitter (DJ) Cycle-to-Cycle Jitter (RJ) Total Jitter (TJ) Crosstalk-Induced Jitter Channel-to-Channel tr, tf Notes: 7. High-speed AC parameters are guaranteed by design and characterization. VIN swing 100mV unless otherwise noted. 8. Input-to-input skew is the difference in time between two inputs to the output within a bank. 9. Bank-to-bank skew is the difference in time from input to the output between bank. 10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. 11. Random jitter is measured with a K28.7 comma detect character pattern, measured at 5Gbps and 2.5Gbps/3.2Gbps. 12. Deterministic jitter is measured at 2.5Gbps/3.2Gbps, with both K28.5 and 223-1 PRBS pattern. 13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn-Tn-1 where T is the time between rising edges of the output signal. 14. Total jitter definition: with an ideal clock input of frequency fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. 15. Crosstalk is measured at the output while applying two similar frequencies that are asynchronous with respect to each other at the inputs. Condition NRZ Data Clock Min 10.7 Typ 7 Max Units Gbps GHz VIN 300mV Note 8 Note 9 Note 10 Note 11 Note 12 Note 13 Note 14 Note 15, Within-bank. At full swing. 140 100 215 220 6 8 290 400 15 20 100 1 10 1 10 0.7 ps ps ps ps ps psRMS psPP psRMS psPP psRMS ps Output Rise/Fall Time 20% to 80% 20 55 80 TRUTH TABLES INA0 0 1 X X INB0 0 1 X X /INA0 1 0 X X /INB0 1 0 X X INA1 X X 0 1 INB1 X X 0 1 /INA1 X X 1 0 /INB1 X X 1 0 SELA 0 0 1 1 SELB 0 0 1 1 QA 0 1 0 1 QB 0 1 0 1 /QA 1 0 1 0 /QB 1 0 1 0 M9999-020207 hbwhelp@micrel.com or (408) 955-1690 5 Micrel, Inc. Precision Edge(R) SY58027U SINGLE-ENDED AND DIFFERENTIAL SWINGS VIN, VOUT 400mV (Typ.) VDIFF_IN, VDIFF_OUT 800mV (Typ.) Figure 1a. Single-Ended Voltage Swing Figure 1b. Differential Voltage Swing TIMING DIAGRAM INA0, INA1 /INA0, /INA1 tpd QA /QA INB0, INB1 /INB0, /INB1 tpd QB /QB SELA SELA-to-QA tpd QA /QA tpd SELB SELB-to-QB tpd QB /QB tpd M9999-020207 hbwhelp@micrel.com or (408) 955-1690 6 Micrel, Inc. Precision Edge(R) SY58027U TYPICAL OPERATING CHARACTERISTICS VCC = 3.3V, TA = 25C, RL = 50 to VCC - 2V, DC coupled, unless otherwise stated. 200MHz Output TA = 25C VCC = 3.3V 2GHz Output TA = 25C VCC = 3.3V Output Swing (100mV/div.) Output Swing (100mV/div.) /Q Q TIME (600ps/div.) TIME (70ps/div.) 2.5Gbps Output TA = 25C VCC = 3.3V 3.2Gbps Output TA = 25C VCC = 3.3V Output Swing (100mV/div.) TIME (100ps/div.) Output Swing (100mV/div.) TIME (100ps/div.) 5Gbps Output TA = 25C VCC = 3.3V Output Swing (100mV/div.) /Q Q TIME (50ps/div.) Propagation Delay vs. Temperature HSTL (1000mV) CML (200mV) OUTPUT SWING (mV) 230 PROPAGATION DELAY (ps) 220 210 200 190 500 450 400 350 300 250 200 150 100 50 0 Frequency vs. Output Swing 180 LVDS (400mV) PECL (800mV) 170 SEL (1.6V) 160 150 -50 -25 0 25 50 75 TEMPERATURE (C) 100 10000 FREQUENCY (MHz) M9999-020207 hbwhelp@micrel.com or (408) 955-1690 7 12000 2000 4000 6000 8000 0 Micrel, Inc. Precision Edge(R) SY58027U INPUT AND OUTPUT STAGE INTERNAL TERMINATION VCC VCC IN 50 VT GND 50 /IN /Q Q Figure 2a. Simplified Differential Input Stage Figure 2b. Simplified LVPECL Output Stage INPUT INTERFACE APPLICATIONS VCC VCC IN LVPECL IN LVPECL VCC /IN VCC GND Rp 0.01F VT NC VREF-AC SY58027U /IN Rp GND GND Rp VCC VT VREF-AC SY58027U IN LVDS /IN SY58027U GND NC NC VT VREF-AC GND For VCC = 3.3V, Rp = 50. For VCC = 2.5V, Rp = 19. 0.01F For VCC=3.3V, Rp = 100. For VCC=2.5V, Rp = 50. Figure 3a. DC-Coupled PECL Interface VCC Figure 3b. AC-Coupled PECL Interface Figure 3c. LVDS Interface VCC IN CML /IN CML SY58027U GND NC NC VT VREF-AC GND VCC 0.01F VT VREF-AC /IN SY58027U IN Option: May connect VT to VCC. Figure 3d. DC-Coupled CML Interface Figure 3e. AC-Coupled CML Interface M9999-020207 hbwhelp@micrel.com or (408) 955-1690 8 Micrel, Inc. Precision Edge(R) SY58027U OUTPUT INTERFACE APPLICATIONS +3.3V +3.3V ZO = 50 ZO = 50 R1 130 R1 130 +3.3V +3.3V ZO = 50 ZO = 50 +3.3V R2 82 R2 82 50 50 50 VCC C (Optional) 0.01F Figure 4a. Parallel Thevenin-Equivalent Termination +3.3V R1 130 Figure 4b. Parallel Termination (3-Resistor) +3.3V Terminate unused output to VCC -2V to balance the differential output pair. R2 82 Figure 4c. Terminating Unused Output RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION Part Number SY58016L SY58017U SY58018U SY58019U SY58025U SY58026U SY58051U SY58052U HBW Solutions Function 3.3V 10Gbps Differential CML Line Driver/Receiver with Internal Termination 10.7Gbps Differential CML 2:1 MUX with Internal Termination 5Gbps LVPECL 2:1 MUX with Internal Termination 10.7Gbps 400mV LVPECL 2:1 MUX with Internal Termination 10.7Gbps Dual 2:1 CML MUX with Internal Termination 5Gbps Dual 2:1 LVPECL MUX with Internal Termination 10.7Gbps AnyGate(R) with Internal Input and Output Termination 10Gbps Clock/Data Retimer with 50 Input Termination MLFTM Application Note New Products and Applications Data Sheet Link http://www.micrel.com/product-info/products/sy58016l.shtml http://www.micrel.com/product-info/products/sy58017u.shtml http://www.micrel.com/product-info/products/sy58018u.shtml http://www.micrel.com/product-info/products/sy58019u.shtml http://www.micrel.com/product-info/products/sy58025u.shtml http://www.micrel.com/product-info/products/sy58026u.shtml http://www.micrel.com/product-info/products/sy58051u.shtml http://www.micrel.com/product-info/products/sy58052u.shtml www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf www.micrel.com/product-info/products/solutions.shtml M9999-020207 hbwhelp@micrel.com or (408) 955-1690 9 Micrel, Inc. Precision Edge(R) SY58027U 32-PIN MicroLeadFrame(R) (MLF-32) Package EP- Exposed Pad Die CompSide Island Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane PCB Thermal Consideration for 32-Pin MLF(R) Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: 1. Package meets Level 2 Moisture Sensitivity Classification. 2. All parts are dry-packaged before shipment. 3. Exposed pads must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 TEL USA + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated. M9999-020207 hbwhelp@micrel.com or (408) 955-1690 10 |
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